1. Field of the Invention
The invention relates to a multicore processor carrying a plurality of cores and an onboard electronic control unit using same.
2. Description of the Related Art
For example, Japanese Patent Application Publication No. 2007-47966 (JP-A-2007-47966) describes reducing power consumption in a low power consumption mode of an electronic device that will make a transition to a stand-by mode, the electronic device using a large scale integration (LSI) incorporating a plurality of central processing unit (CPU) cores. In such an electronic device, a CPU is provided with a usual operation mode and a low power consumption mode, a clock frequency supplied to the CPU can be changed, the CPUs can detect the operation mode of each other, and the CPUs can notify each other of an operation mode change request.
For example, Japanese Patent Application Publication No. 2007-43554 (JP-A-2007-43554) describes an electromagnetic interference (EMI) countermeasure method in an electronic circuit substrate having an application-specific integrated circuits (ASIC) (integrated circuit) mounted thereon, wherein ripples are superimposed on a power source voltage supplied to power source terminals of the ASIC, whereby the stability of operating frequency of a logic circuit frequency and a power source line inside the ASIC is decreased and a jitter component of the operating frequency of the internal circuit of the ASIC is increased, thereby reducing EMI (radiation noise) from the ASIC and electronic circuit substrate.
An onboard electronic system is constituted by a plurality of electronic control units (ECU), and practically all of the ECU carry a microcomputer (a computational device in which the processing contents can be easily changed by software). A microcomputer incorporates a core (also called a CPU) processing the software. In recent years, the clock frequency that causes the core to operate has greatly increased due to a demand for rapid increase of processing capacity and became a main factor of radiation noise generated by the ECU. In particular, in a multicore processor that carries a plurality of cores, since a large number of cores operating at a high frequency are present, high-intensity noise is generated at a frequency that is obtained by dividing or multiplying the operating frequency.
Concerning the radiation noise, in FIG. 1, a frequency is plotted against the abscissa and a noise signal intensity is plotted against the ordinate for two signals S1, S2. As shown in FIG. 1, the signal S1 has an average level of signal intensity lower than that of the signal S2, but the peak signal is equal to or higher than a determination threshold at the natural frequency. In this case, the signal S2 produces a smaller effect on the acoustic system because no peak signal is present.
Concerning power consumption, FIG. 2 shows an example of variation of power consumed by a microcomputer with time. When power variation such as shown in FIG. 2 is present, the power source IC in the electronic control unit should be designed to have power supply capability that satisfies the peak values (generated in software processing of a constant period) in points of time ta1,a2,a3. Furthermore, the variation accommodation capability that makes it possible to accommodate such power variations is required and this results in increased cost.
These problems are mainly attributed to the fact that the core operates at a constant frequency, and the effect thereof becomes significant in the case of multiple cores.
Another possible countermeasure involves changing the core operating frequency in a time sequence. However, a problem arising when the operating frequency of each core is changes in a time sequence in a similar manner in the case of multiple cores is that the effect increases proportionally to the number of cores.